Microchip continues the push for RISC-V hardware by reaching milestones with its PolarFire system-on-a-chip (SoC) field-programmable gate array (FPGA) and Mi-V ecosystem.
Microchip continues the push for RISC-V hardware by reaching milestones with its PolarFire system-on-a-chip (SoC) field-programmable gate array (FPGA) and Mi-V ecosystem.
A major player has joined the effort to build out the world’s largest and most successful open-source ISA.
A major player has joined the effort to build out the world’s largest and most successful open-source ISA.
If 2021's RISC-V Summit told us anything, it's that the open-source hardware movement isn't slowing down anytime soon.
If 2021's RISC-V Summit told us anything, it's that the open-source hardware movement isn't slowing down anytime soon.
MIPS is tapping Imperas to simplify the process of testing and verifying RISC-V processors. What goes into verification…
MIPS is tapping Imperas to simplify the process of testing and verifying RISC-V processors. What goes into verification when it comes to RISC-V?
RISC-V is often associated with embedded projects. Now, the open-source ISA may be a more common player in higher-end…
RISC-V is often associated with embedded projects. Now, the open-source ISA may be a more common player in higher-end computing markets.
As the need for AI and data center processing keeps rising, a new AI accelerator has risen to the challenge. After years…
As the need for AI and data center processing keeps rising, a new AI accelerator has risen to the challenge. After years of development, Esperanto has announced its ET-SoC-1 ML inference chip.
RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the…
RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the RISC-V Foundation.
On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.
On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.
As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.
As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.
Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.
Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.
The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.
The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.
Alibaba is set to produce the next generation of Chinese processors with the RISC-V instead of Arm architecture.
Alibaba is set to produce the next generation of Chinese processors with the RISC-V instead of Arm architecture.
Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?
Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.
Continuing our series on the Instruction Set Architecture (ISA), this week we delve into the PowerPC ISA.
Continuing our series on the Instruction Set Architecture (ISA), this week we delve into the PowerPC ISA.
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the…
AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the benefits to IP sharing, and what he believes will be important for the future of SoC design.
The catalog of IPs includes security cores, Logic NVM technology, embedded analytics, and multicore debugging toolsets.
The catalog of IPs includes security cores, Logic NVM technology, embedded analytics, and multicore debugging toolsets.
SiFive, the company behind the first RISC-V based SoCs, has recently announced the addition of Flex Logix’s FPGA IP to…
SiFive, the company behind the first RISC-V based SoCs, has recently announced the addition of Flex Logix’s FPGA IP to its DesignShare initiative.
The RISC-V Foundation has continued to build on its momentum, announcing that this month the open-source ISA presence at…
The RISC-V Foundation has continued to build on its momentum, announcing that this month the open-source ISA presence at HOT CHIPS 29.
Open source hardware met open source instruction set architecture this month when SiFive announced the Arduino…
Open source hardware met open source instruction set architecture this month when SiFive announced the Arduino Cinque—an Arduino development board based off the RISC-V ISA.
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