The new updates leverage AI to develop reliable circuits without all the tedious work, while also keeping high-speed routing tight and efficient.
The new updates leverage AI to develop reliable circuits without all the tedious work, while also keeping high-speed routing tight and efficient.
Unveiled today, the new timing chips from Mixed-Signal Devices offer 2 GHz performance and use scalable CMOS to overcome…
Unveiled today, the new timing chips from Mixed-Signal Devices offer 2 GHz performance and use scalable CMOS to overcome the limits of analog alternatives.
Announced today, the high-performance switch IC enables scale-up and scale-out for AI networks and supports co-packaged optics.
Announced today, the high-performance switch IC enables scale-up and scale-out for AI networks and supports co-packaged optics.
New software editions bring enterprise-grade functionality to small- and medium-sized teams.
New software editions bring enterprise-grade functionality to small- and medium-sized teams.
The new processor reportedly offers 100x lower latency and 500x lower energy consumption than conventional AI processors.
The new processor reportedly offers 100x lower latency and 500x lower energy consumption than conventional AI processors.
At Computex 2025, Intel expanded its hardware lineup with GPUs for AI inference and creative workloads and an accelerator…
At Computex 2025, Intel expanded its hardware lineup with GPUs for AI inference and creative workloads and an accelerator for large-scale generative AI training.
Intel and Shell have partnered to deliver the first Intel-certified immersion cooling solution for Xeon processors,…
Intel and Shell have partnered to deliver the first Intel-certified immersion cooling solution for Xeon processors, addressing rising AI data center demands.
Structera CXL interoperability will drive memory performance increases for data centers operating both AMD EPYC CPUs and…
Structera CXL interoperability will drive memory performance increases for data centers operating both AMD EPYC CPUs and 5th Gen Intel Xeon CPUs.
TSMC’s new A14 process is already backed by certified EDA tools from Cadence, Synopsys, and Siemens to accelerate…
TSMC’s new A14 process is already backed by certified EDA tools from Cadence, Synopsys, and Siemens to accelerate next-gen AI and chiplet-based designs.
Taking a holistic view of data centers, Microchip is upgrading its connectivity, storage, and computer portfolios to…
Taking a holistic view of data centers, Microchip is upgrading its connectivity, storage, and computer portfolios to provide comprehensive support for the AI boom.
JEDEC’s HBM4 standard delivers up to 2 TB/s bandwidth, higher capacity (up to 64 GB per stack), and improved…
JEDEC’s HBM4 standard delivers up to 2 TB/s bandwidth, higher capacity (up to 64 GB per stack), and improved efficiency for AI and HPC.
Siemens, Nokia, Infineon, Onsemi, and Black Semiconductor are making targeted acquisitions to expand their capabilities…
Siemens, Nokia, Infineon, Onsemi, and Black Semiconductor are making targeted acquisitions to expand their capabilities in manufacturing, connectivity, and advanced materials.
New photonic devices are testing the bounds of optical technology, from creating direct quantum links to achieving…
New photonic devices are testing the bounds of optical technology, from creating direct quantum links to achieving one-way light control.
The tool suite automatically analyzes shared memory and measures worst-case execution time to ensure deterministic…
The tool suite automatically analyzes shared memory and measures worst-case execution time to ensure deterministic execution time for RISC-V processors.
In this exclusive Embedded World 2025 interview, we talk to AMD’s Kirk Saban about edge AI, ASICs vs. FPGAs, Adaptive…
In this exclusive Embedded World 2025 interview, we talk to AMD’s Kirk Saban about edge AI, ASICs vs. FPGAs, Adaptive SoCs, embedded x86, and the outlook ahead.
In this installment of Women's History Month spotlights, we highlight Ginni Rometty, IBM's CEO from 2012–2020, who led…
In this installment of Women's History Month spotlights, we highlight Ginni Rometty, IBM's CEO from 2012–2020, who led the company through a time of rapid digital transformation.
Unveiled today at Embedded World, Cisco and IBM have already adopted the CPUs with their “Zen 5” architecture, which…
Unveiled today at Embedded World, Cisco and IBM have already adopted the CPUs with their “Zen 5” architecture, which offers server-grade performance and efficiency.
Announced today ahead of Embedded World, the new MCU families bring new possibilities to edge and connected devices.
Announced today ahead of Embedded World, the new MCU families bring new possibilities to edge and connected devices.
Ocelot uses bosonic cat qubits to correct errors with just nine physical qubits per logical qubit—far fewer than…
Ocelot uses bosonic cat qubits to correct errors with just nine physical qubits per logical qubit—far fewer than traditional surface codes.
Intel says the new processors cover the “broadest set of workloads in the industry.”
Intel says the new processors cover the “broadest set of workloads in the industry.”
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