Do you remember when supercomputers were described by their processing power? That was so 2024. Today, we talk about the power for processing. Goodbye terraops,…
Do you remember when supercomputers were described by their processing power? That was so 2024. Today, we talk about the power for processing. Goodbye terraops, hello terrawatt-hours!
Enjoy this roundup of our favorite All About Circuits research news articles of 2025!
Enjoy this roundup of our favorite All About Circuits research news articles of 2025!
New Graviton5-based EC2 M9g instances push performance, core density, and security design to the next level.
New Graviton5-based EC2 M9g instances push performance, core density, and security design to the next level.
Q.ANT has debuted NPU 2 with enhanced nonlinear optical processing, delivering major gains in efficiency and performance…
Q.ANT has debuted NPU 2 with enhanced nonlinear optical processing, delivering major gains in efficiency and performance for next-generation AI and HPC workloads.
Rebellions employed Synopsys' VCS, ZeBu, Virtualizer, and the Verification Continuum to achieve full bring-up and live…
Rebellions employed Synopsys' VCS, ZeBu, Virtualizer, and the Verification Continuum to achieve full bring-up and live demo just five weeks after first silicon.
Azure Cobalt 200 aims to deliver a 50% performance gain over its predecessor for real-world cloud workloads.
Azure Cobalt 200 aims to deliver a 50% performance gain over its predecessor for real-world cloud workloads.
The chips are Qualcomm's first industrial-grade PC processors built for PLCs, panel PCs, and edge controllers with…
The chips are Qualcomm's first industrial-grade PC processors built for PLCs, panel PCs, and edge controllers with support for Windows.
In this roundup, we highlight six recent announcements that demonstrate how semiconductor leaders are redefining the…
In this roundup, we highlight six recent announcements that demonstrate how semiconductor leaders are redefining the hardware stack for large-scale AI inference.
From neuromorphic edge silicon to formal Rust verification, this year’s show revealed how embedded design is evolving…
From neuromorphic edge silicon to formal Rust verification, this year’s show revealed how embedded design is evolving at every level.
The company’s first silicon-proven NASP device delivers microwatt-level, real-time voice processing at the sensor edge.
The company’s first silicon-proven NASP device delivers microwatt-level, real-time voice processing at the sensor edge.
Researchers in Europe have restored reading vision to people with dry age-related macular degeneration using a retinal…
Researchers in Europe have restored reading vision to people with dry age-related macular degeneration using a retinal implant and AR glasses.
All About Circuits attended a private media briefing in New York City to learn how this chip can extend "all day battery…
All About Circuits attended a private media briefing in New York City to learn how this chip can extend "all day battery life for every day computing."
NXP’s new SoC brings on-chip neural processing and security to in-cabin intelligence.
NXP’s new SoC brings on-chip neural processing and security to in-cabin intelligence.
Arm is lowering the barrier to entry for chiplet-based SoCs and Armv9-powered AI devices across data centers, cars, and the edge.
Arm is lowering the barrier to entry for chiplet-based SoCs and Armv9-powered AI devices across data centers, cars, and the edge.
Apple’s M5 chip brings per-core neural acceleration, a 30% boost in memory bandwidth, and GPU-driven AI to the MacBook…
Apple’s M5 chip brings per-core neural acceleration, a 30% boost in memory bandwidth, and GPU-driven AI to the MacBook Pro and iPad Pro.
Intel has pulled back the curtain on Panther Lake, the first client architecture built on its advanced 18A process node.
Intel has pulled back the curtain on Panther Lake, the first client architecture built on its advanced 18A process node.
Developed with SiFive, the dual-core SoC uses patented error correction to achieve a record 16.8 µW/MHz/DMIPS, targeting…
Developed with SiFive, the dual-core SoC uses patented error correction to achieve a record 16.8 µW/MHz/DMIPS, targeting next-gen wearables, drones, and IoT sensors.
Leveraging Synaptics’ partnership with Google Research, the new SoC is positioned between microcontroller-class devices…
Leveraging Synaptics’ partnership with Google Research, the new SoC is positioned between microcontroller-class devices and high-end embedded MPUs.
The dual launch places Snapdragon at the center of AI-focused mobile and PC experiences.
The dual launch places Snapdragon at the center of AI-focused mobile and PC experiences.
Motorola’s 68000 blended 32-bit power with a 16-bit bus, creating a balanced, orthogonal, and elegant architecture that…
Motorola’s 68000 blended 32-bit power with a 16-bit bus, creating a balanced, orthogonal, and elegant architecture that powered everything from Macintosh to arcade machines.
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