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The New Moore’s Law: Why Optical Computing Could Redefine Scaling for AI

The New Moore’s Law: Why Optical Computing Could Redefine Scaling for AI

Optical computing is the "New Moore's Law" for AI. It solves electronic scaling limits, offering higher speed, lower power, and efficiency gains proportional to problem size for matrix operations.


The Configurable Matrix Computer: A New Alternative to the von Neumann Architecture

The Configurable Matrix Computer: A New Alternative to the von Neumann Architecture

Learn how this new type of AI processor provides a 100x improvement in power and performance over conventional GPUs or MCUs.


Edge AI’s Next Battlefield: Development Tools

Edge AI’s Next Battlefield: Development Tools

Learn why the best silicon is useless without the right AI developer tools.


Solving the QLC NAND Flash SSD Scaling Challenge

Solving the QLC NAND Flash SSD Scaling Challenge

Learn how to solve QLC NAND's endurance, ECC, and performance issues for hyperscale. The approach blends a PCIe Gen5 controller with hardware-accelerated LDPC, PerformaShape QoS, and more.


Security and Upgradeability: Key for Moving From Proof-of-Concept to Product

Security and Upgradeability: Key for Moving From Proof-of-Concept to Product

We examine the software used in a 2025 object detection demo and the lessons it holds for developing new edge AI products.


How Machine Learning Is Shrinking to Fit the Sensor Node

How Machine Learning Is Shrinking to Fit the Sensor Node

Learn how “right-sized” machine learning enables edge devices to make critical decisions locally, improving reliability and reducing reliance on cloud connectivity in remote, volatile environments.


Using Worst-Case Execution Time Analysis to Uncover Hidden Timing Couplings

Using Worst-Case Execution Time Analysis to Uncover Hidden Timing Couplings

Learn about "hidden" timing couplings in multicore systems that cause unexpected interference, significantly impacting Worst-Case Execution Time (WCET) even for independent tasks.


Packing More Brains Into Buds: Multi-Feature AI on Tiny Silicon

Packing More Brains Into Buds: Multi-Feature AI on Tiny Silicon

Outfitting earbuds with more AI can be a challenge. Learn how compression techniques like sparsity, quantization, and memory-aware scheduling can help smooth the way.


Common Antenna Integration Challenges and How to Handle Them

Common Antenna Integration Challenges and How to Handle Them

The design of RF systems requires engineers to face complex challenges. Learn how automated tools augmented with AI are becoming available to help with this.


Advancing Telecommunications With Edge AI

Advancing Telecommunications With Edge AI

By strategically incorporating artificial intelligence throughout their networks, telecom companies can meet demand for better performance, streamlined operations, and improved customer experiences.


Design for the Future: How UALink Interconnects Empower Next-Gen AI Systems

Design for the Future: How UALink Interconnects Empower Next-Gen AI Systems

Learn how UALink offers an open, high-speed interconnect for AI accelerators, that enables scalable, low-latency, and energy-efficient AI systems for next-gen workloads.


How Mature-Technology ASICs Can Give You the Edge

How Mature-Technology ASICs Can Give You the Edge

Learn how application-specific integrated circuits can enable companies to leverage their key IP and distinguish themselves from competitors who use off-the-shelf ICs.


AI’s Appetite for Memory: Can Hardware Designs Keep Pace?

AI’s Appetite for Memory: Can Hardware Designs Keep Pace?

Memory selection has become a priority, as AI system designs demand more memory. Learn how to navigate hardware designs impacts and supply chain issues, and how BOM management tools help smooth the way.


Beyond Copper and Optical, a New Interconnect Eyes Next Gen Data Centers

Beyond Copper and Optical, a New Interconnect Eyes Next Gen Data Centers

Both copper and optical interconnects face limitations as choices for next gen data centers. Learn how a third option promises to enable scaling up AI clusters in data centers for years to come.


Edge AI Meets Next-Gen Cooling: The Breakthrough of Silicon-Based Micro-Cooling Fans

Edge AI Meets Next-Gen Cooling: The Breakthrough of Silicon-Based Micro-Cooling Fans

MEMS-based miniature-fan technology can provide improved thermal performance, increased reliability, and reduced noise for advanced processors.


AI Inferencing in Data Centers: Breaking the Efficiency-Cost Tradeoff

AI Inferencing in Data Centers: Breaking the Efficiency-Cost Tradeoff

Training and inferencing comprise two crucial aspects of AI processing in datacenters. Learn the differences between the two, and the cost-efficiency issues involved.


Post-Quantum Cryptography—Securing Semiconductors in a Post-Quantum World

Post-Quantum Cryptography—Securing Semiconductors in a Post-Quantum World

Quantum computing advances are exciting, but they’re also a looming threat to securing ICs, driving the need for Post-Quantum Cryptography (PQC). Learn about PQC, how it’s being implemented, and the legislation involved.


Unlocking the Future: AI-Driven Embedded Systems

Unlocking the Future: AI-Driven Embedded Systems

AI-driven embedded systems are enabling smarter, more efficient, and adaptive systems. We will explore key industry innovations and identify applications that can benefit from this revolutionary technology.


Rethinking Computational Storage: Unlock the Processing Power of SSDs

Rethinking Computational Storage: Unlock the Processing Power of SSDs

Generic concepts of computational storage are a dead end, but targeted accelerators leveraging the massive on-board bandwidth of solid-state drives may benefit high-performance computing.


Harnessing the Power of a Software-Based Image Signal Processing Approach

Harnessing the Power of a Software-Based Image Signal Processing Approach

There are numerous advantages to leveraging a software-based image signal processor (ISP) approach. Learn the advantages and the solutions available to implement this technology.