This article will review the common FPGA resources that allow us to efficiently generate and distribute clock signals throughout a system.
This article will review the common FPGA resources that allow us to efficiently generate and distribute clock signals throughout a system.
This article discusses a technique in which frequency-domain subtraction is used to selectively suppress the noise…
This article discusses a technique in which frequency-domain subtraction is used to selectively suppress the noise components in an audio signal.
This article is an introduction to the complex topic of DSP-based reduction of noise in audio signals.
This article is an introduction to the complex topic of DSP-based reduction of noise in audio signals.
In this article, we’ll use Scilab to create an FM waveform that carries information corresponding to an audio recording.
In this article, we’ll use Scilab to create an FM waveform that carries information corresponding to an audio recording.
Learn about digital-signal-processing concepts that help us to store and manipulate color information.
Learn about digital-signal-processing concepts that help us to store and manipulate color information.
Learn about a hardware-based approach to performing calculations, routing digital signals, and controlling embedded…
Learn about a hardware-based approach to performing calculations, routing digital signals, and controlling embedded systems using programmable logic and FPGAs.
Could you concisely define "embedded system design" off the top of your head? This article looks at the essential…
Could you concisely define "embedded system design" off the top of your head? This article looks at the essential characteristics of an increasingly prominent specialization within the field of electrical engineering.
This article will look at some of the consequences of adding a reset input to an FPGA design.
This article will look at some of the consequences of adding a reset input to an FPGA design.
In this article, we’ll discuss implementing a simple direct digital synthesizer (DDS) using the Xilinx System Generator.
In this article, we’ll discuss implementing a simple direct digital synthesizer (DDS) using the Xilinx System Generator.
This article discusses digital down-conversion which is a digital-signal-processing technique widely used in digital…
This article discusses digital down-conversion which is a digital-signal-processing technique widely used in digital radio receivers.
This article will review considerations for efficient FPGA implementation of symmetric FIR filters.
This article will review considerations for efficient FPGA implementation of symmetric FIR filters.
This article will review integrating a Xilinx IP core into an FPGA design.
This article will review integrating a Xilinx IP core into an FPGA design.
This article will review the structure of the binary multipliers that use the look-up tables (LUTs) in the Xilinx logic fabric.
This article will review the structure of the binary multipliers that use the look-up tables (LUTs) in the Xilinx logic fabric.
This article looks at some circuits that can help you extract the original data from a Manchester-encoded signal.
This article looks at some circuits that can help you extract the original data from a Manchester-encoded signal.
This article discusses implementation details for a simple yet effective technique that can improve your digital communication.
This article discusses implementation details for a simple yet effective technique that can improve your digital communication.
This article explains pipelining and its implications with respect to FPGAs, i.e., latency, throughput, change in…
This article explains pipelining and its implications with respect to FPGAs, i.e., latency, throughput, change in operating frequency, and resource utilization.
This article discusses an efficient implementation of the interpolation filters called the polyphase implementation.
This article discusses an efficient implementation of the interpolation filters called the polyphase implementation.
Fixed-point representation allows us to use fractional numbers on low-cost integer hardware.
Fixed-point representation allows us to use fractional numbers on low-cost integer hardware.
This article discusses circular buffering, which allows us to significantly accelerate the data transfer in a real-time system.
This article discusses circular buffering, which allows us to significantly accelerate the data transfer in a real-time system.
This article explains the Look-Up Tables (LUTs) constituting Field Programmable Gate Arrays (FPGAs).
This article explains the Look-Up Tables (LUTs) constituting Field Programmable Gate Arrays (FPGAs).