In this article, we’ll use Scilab to generate numerical signals that can be converted into analog waveforms by a computer’s audio hardware.
In this article, we’ll use Scilab to generate numerical signals that can be converted into analog waveforms by a computer’s audio hardware.
This article will try to develop a better insight into wave reflection that can occur when driving a relatively long wire…
This article will try to develop a better insight into wave reflection that can occur when driving a relatively long wire with a fast logic gate.
Learn about a hardware-based approach to performing calculations, routing digital signals, and controlling embedded…
Learn about a hardware-based approach to performing calculations, routing digital signals, and controlling embedded systems using programmable logic and FPGAs.
This article will look at some of the consequences of adding a reset input to an FPGA design.
This article will look at some of the consequences of adding a reset input to an FPGA design.
This article will review the operation of a basic ECL inverter/buffer, and then we’ll look at some of the most…
This article will review the operation of a basic ECL inverter/buffer, and then we’ll look at some of the most important features of this logic family.
In this article, we’ll discuss implementing a simple direct digital synthesizer (DDS) using the Xilinx System Generator.
In this article, we’ll discuss implementing a simple direct digital synthesizer (DDS) using the Xilinx System Generator.
This article will discuss phase truncation in direct digital synthesizers.
This article will discuss phase truncation in direct digital synthesizers.
Everyone needs a negative voltage rail eventually, but most only have a single rail supply. This project will show you…
Everyone needs a negative voltage rail eventually, but most only have a single rail supply. This project will show you how to build a negative voltage generator that runs off a single rail supply!
This article discusses the good and the bad regarding Schmitt Trigger RC oscillators. These oscillators are especially…
This article discusses the good and the bad regarding Schmitt Trigger RC oscillators. These oscillators are especially important because they are present in the internal oscillator in many popular MCUs.
This article will review considerations for efficient FPGA implementation of symmetric FIR filters.
This article will review considerations for efficient FPGA implementation of symmetric FIR filters.
This article will review the distributed arithmetic which is an interesting method of efficiently implementing…
This article will review the distributed arithmetic which is an interesting method of efficiently implementing multiply-and-accumulate operations.
This article will review the structure of the binary multipliers that use the look-up tables (LUTs) in the Xilinx logic fabric.
This article will review the structure of the binary multipliers that use the look-up tables (LUTs) in the Xilinx logic fabric.
This article reviews the use of carry-save adders to efficiently compute a multioperand addition.
This article reviews the use of carry-save adders to efficiently compute a multioperand addition.
This article defines VHDL components, describes component declaration, and gives examples of how to use VHDL components…
This article defines VHDL components, describes component declaration, and gives examples of how to use VHDL components in your code. It also touches on the "for-generate" statement and its uses.
This article will discuss the basic concepts of clock gating and how it can be used to reduce the power consumption of…
This article will discuss the basic concepts of clock gating and how it can be used to reduce the power consumption of synchronous digital systems.
This article discusses implementation details for a simple yet effective technique that can improve your digital communication.
This article discusses implementation details for a simple yet effective technique that can improve your digital communication.
This article explains pipelining and its implications with respect to FPGAs, i.e., latency, throughput, change in…
This article explains pipelining and its implications with respect to FPGAs, i.e., latency, throughput, change in operating frequency, and resource utilization.
This article will review the concurrent signal assignment statements in VHDL.
This article will review the concurrent signal assignment statements in VHDL.
This article will review the theory of the two’s complement representation along with some examples.
This article will review the theory of the two’s complement representation along with some examples.
This article explains the Look-Up Tables (LUTs) constituting Field Programmable Gate Arrays (FPGAs).
This article explains the Look-Up Tables (LUTs) constituting Field Programmable Gate Arrays (FPGAs).