Latest Digital ICs Technical Articles

In this article, we’ll see that a memory element can be unintentionally inferred from an incomplete “if” statement.

In this article, we’ll see that a memory element can be unintentionally inferred from an incomplete “if” statement.

This article will review two important sequential statements in VHDL, namely “if” and “case” statements.

This article will review two important sequential statements in VHDL, namely “if” and “case” statements.

This article explains pipelining and its implications with respect to FPGAs, i.e., latency, throughput, change in…

This article explains pipelining and its implications with respect to FPGAs, i.e., latency, throughput, change in operating frequency, and resource utilization.

This article will discuss the important features of variables in VHDL.

This article will discuss the important features of variables in VHDL.

This article will try to develop a better understanding of the sequential statement’s importance in VHDL.

This article will try to develop a better understanding of the sequential statement’s importance in VHDL.

This article, part of AAC’s Analog Circuit Collection, presents a simple yet effective replacement for ADC-based window…

This article, part of AAC’s Analog Circuit Collection, presents a simple yet effective replacement for ADC-based window detection.

This article will review the “signed”/“unsigned” data types.

This article will review the “signed”/“unsigned” data types.

This article will discuss the VHDL integer data type.

This article will discuss the VHDL integer data type.

This article will first review classifications for the VHDL data types, and then it will discuss the enumerated type.

This article will first review classifications for the VHDL data types, and then it will discuss the enumerated type.

This article will review the "std_logic_vector" data type which is one of the most common data types in VHDL.

This article will review the "std_logic_vector" data type which is one of the most common data types in VHDL.

This article will review the concurrent signal assignment statements in VHDL.

This article will review the concurrent signal assignment statements in VHDL.

This article gives some introductory examples for VHDL coding, a hardware description language used in digital circuit design.

This article gives some introductory examples for VHDL coding, a hardware description language used in digital circuit design.

This article discusses an efficient implementation of the interpolation filters called the polyphase implementation.

This article discusses an efficient implementation of the interpolation filters called the polyphase implementation.

Fixed-point representation allows us to use fractional numbers on low-cost integer hardware.

Fixed-point representation allows us to use fractional numbers on low-cost integer hardware.

This article will review the theory of the two’s complement representation along with some examples.

This article will review the theory of the two’s complement representation along with some examples.

This article discusses circular buffering, which allows us to significantly accelerate the data transfer in a real-time system.

This article discusses circular buffering, which allows us to significantly accelerate the data transfer in a real-time system.

This article explains the Look-Up Tables (LUTs) constituting Field Programmable Gate Arrays (FPGAs).

This article explains the Look-Up Tables (LUTs) constituting Field Programmable Gate Arrays (FPGAs).

This article will verify that a suitable structure can reduce the sensitivity of a digital filter response to the…

This article will verify that a suitable structure can reduce the sensitivity of a digital filter response to the coefficient quantization.

This article will review some basic structures to implement Finite Impulse Response (FIR) filters.

This article will review some basic structures to implement Finite Impulse Response (FIR) filters.